OREANDA-NEWS. Signaling a new era in design productivity for a new generation of programmable logic devices, Altera Corporation (Nasdaq: ALTR) today released the Quartus® Prime design software. Altera’s new software environment builds upon the company’s proven, user-friendly Quartus II software and incorporates the new productivity-centric Spectra-Q™ engine. The new Quartus Prime design software is optimized to enhance the FPGA and SoC FPGA design process by reducing design iterations, delivering the industry’s fastest compile times, and accelerating silicon performance.

“Our software tools are known throughout the industry for providing the highest levels of performance and productivity,” said Alex Grbic, senior director of software and IP marketing at Altera. “The Quartus Prime design software extends Altera's leadership by building upon decades of software innovations to provide our customers with new levels of performance and productivity for programmable logic devices.”

Quartus Prime design software users will experience the same easy-to-use front-end user interface as the previous software version; while the addition of the Spectra-Q engine on the back-end enables unprecedented compile time improvements and increased design performance with a new set of faster and more scalable algorithms. The engine also features a hierarchical database that preserves placement and routing of IP blocks to ensure stable designs, while eliminating unnecessary timing closure efforts and reducing compile times. 

Working with early access customers, the Quartus Prime design software demonstrated significantly higher design performance and designer productivity in multiple Arria® 10 designs. With the release of the Quartus Prime design software version 15.1, customers targeting Arria 10 designs will experience:

  • A full speed-grade advantage on average over the previous software version with the new Hybrid Placer and Global Router algorithms.
  • Up to 10X faster IO design with the new BluePrint Platform Designer.
  • Up to 4X faster compile times using the software’s new Rapid Recompile feature.
  • Expanded hardware description language support, including SystemVerilog-2005 and VHDL-2008.