OREANDA-NEWS. Fujitsu Laboratories Limited and Fujitsu Laboratories of America, Inc. announced the development of a clock distribution circuit that enables a 20% reduction in the power consumed by the transceiver circuits in next-generation servers that transmit data between CPUs.

In recent years, in order to improve the data processing performance of servers, in addition to improving CPU performance, there has been a need to increase the speeds at which data is transmitted between chips, such as CPUs, in a server system. On the other hand, as speeds have increased, more power is consumed by the clock distribution circuits on the transceiver circuits that transmit the data. Now, by building a tiny oscillator circuit into each transceiver and synchronizing the oscillators, Fujitsu researchers succeeded in developing a low-power clock distribution method that eliminates the need to use conventional clock distribution circuits.

It is expected that this technology will contribute to increasing the performance of the next generation of servers and supercomputers.